How to round real type number?

SystemVerilog
, , ,
2

Use an int cast.

module top;
   real A;
   initial begin
      A = 3.4;
      A = int'(A);
      $display(A);
      A = 3.5;
      A = int'(A);
      $display(A);
      A = 3.6;
      A = int'(A);
      $display(A);
   end 
endmodule