In most of the larger subsystem , most of the initial cycles are used for initial states/configuration of the hardware , for example , pcie system needs to be initialized with link training , or for cpu , state request or power management flows would be required prior to any compute cycle to process , most of the time , these initial cycles or states are common across tests . Question is , can we somehow run the hardware with these initial cycles once and use this simulation image from these initial cycles across different tests in order to save up these long initial cycles . I know we could directly force the required signals but that is prone to issues of either missing certain signals or heavy maintenance of these signals .