But I wonder why detecting and adding the 1ps delay (my DUT clock cycle is 1ns) in seq0 will significantly slow down the traffic generation for other sequences?
Thanks for all your help,
Hao
The idea to add 1ps delay was to avoid the simulation hang due to zero time consumption of the while-loop when pause, and it was not a good idea, it makes the simulator’s scheduling overloaded and slow down your simulation. You can improve it by changing:
task body;
int seq_qos; //indicate which qos this sequence represents
...
while (generated_pkt < pkt_to_send)begin
...
wait(dut.pause[seq_qos] == 1'b0); // or using === operator if checking X
start_item(req);
finish_item(req);
generated_pkt++;
end
In case of pause, the code is blocked at “wait” statement until unpause (dut.pause[seq_qos] = 0).