How to pass unknown number of parameter in the function

SystemVerilog
,
11

In reply to zz8318:

I strongly suggest you look at tagged unions

typedef union tagged {
    string Str;
    uint32 Uin;
} arg_t;

function void my_parse( arg_t args[]);
  foreach(args[i])
      case (args[i]) matches
        tagged Str . s: $display("arg[%od] is a string %s",i,s);
        tagged Uin . n: $display("arg[%od] is a uint32 %d",i,n);
      endcase
endfunction