How to list all IFDEF for a given simulation or compiled model?

SystemVerilog
,
1

I am wondering what, if any, my company’s “standard”

`ifdefs

might be… so I want to start collecting lists of what ifdefs the models I deal with use… and eventually I can analyze these to look for any common items (I work in a really big company, with lots of undocumented tribal knowledge).

Additionally, I think this would be helpful to learn if there are any vendor-standard ifdefs… like I can’t tell if my company adds

`define UVM

or if simply compiling with the UVM reference implementation will define that. So an experiment I’d like to do is create a list all the ifdefs of a company-made model, as well as one with a super-simple example testbench I’ve pieced together myself. Then I can compare my simple testbench model with various compile-time options, like FSDB/Novas, OVM/UVM…

Thanks!

2

In reply to ntmccork:

You’ll need to look at your tools user manual for a list of pre-defined defines. The O/UVM has a O/UVM_VERSION_STRING defined.

3

In reply to dave_59:

Hi Dave,
thanks for the info on U/OVM… but the compiler/simualtor manual won’t tell anything about files buried in the model. I guess you’re saying you can’t do what I’m asking, besides maybe

grep -ri "*`define*" ./$MODEL_ROOT

on the command-line.

4

In reply to ntmccork:

Your tool’s User Manual should tell you which macros it defines, and how to find the command line options used to compile a file.