In reply to cgales:
The top-level TB instantiates all required interfaces and connects them to the DUT at the appropriate locations (direct port connections, assigns, bind statements, etc).
I am still a little confused about this .
Here is my interpretation ::
// block_top_tb where Agent Works in Active Mode i.e Driver-Sequencer pair are present
apb_intf intf ( clk , reset ) ; // Driven via Driver at Block-level
Block_DUT block_top ( intf ) ;
initial begin
// Fetched in Test where Agent config object is created and assigned to Env's config object
uvm_config_db#( virtual apb_intf ) :: set( null , "uvm_test_top" , "agent_vif_intf" , intf );
run_test("sanity_test");
end
// Within Monitor at block-level
virtual apb_intf vif_intf ; // Agent could directly assign it after creating monitor component
// [ OR ]
// Within any phase prior to run-time phase ::
// Agent first fetches it's Config and then sets it again via "mon_vif_intf" for the monitor to fetch it ::
uvm_config_db#( virtual apb_intf ) :: get( this , "" , "mon_vif_intf" , vif_intf );
Then when trying to re-use at system-level where the Block-level’s Agent will work in Passive Mode ::
// Within System-level top_tb ::
axi_top system_intf ( clk , reset ) ; // Driven via Driver at System-level
system_top chip_top( axi_top );
Now ’ Block_DUT ’ would exist multiple levels of hierarchy below ’ system_top ’
Eg : top_tb.chip_top.subsystem_a.block_a where the interface signals would be connected during instantiation of block_a ( block_a is instance name of Block_DUT within the System-level DUT )
So how should we set the virtual interface apb_intf for the passive agent to fetch it via it’s Config object ?
The following comes to my mind ::
// Within System-level top_tb create an additional instance of apb_intf ::
assign blk_clk = top_tb.chip_top.subsystem_a.block_a.clk ;
assign blk_rst = top_tb.chip_top.subsystem_a.block_a.rst ;
apb_intf intf_block ( blk_clk , blk_rst );
initial begin
force intf_block.sig1 = top_tb.chip_top.subsystem_a.block_a.sig1 ;
force intf_block.sig2 = top_tb.chip_top.subsystem_a.block_a.sig2 ;
force ............... = ....................................... ;
end
initial begin
uvm_config_db#( virtual apb_intf ) :: set( null , "uvm_test_top" , "block_vif_intf" , intf_block );
end
Would there a better solution possible using bind construct ?