How to get(access) the data members(properties) of sequencer from driver?

UVM
1

in the middle of ( seq driver communication ) I have to access some variables(updated during middle of seq driver communication in sequencer) in driver.

2

Not sure how you exactly update it from within the sequencer but assuming you do - recall that the req (seq_item) is passed by reference (by default) between SQR-DRVR, hence if you update the req while DRVR is still accessing, it should reflect on its own (though never tried that).

3 
//  Within  your  driver  component
 my_sequencer #( req_type , rsp_type )  sqr_h ;  // Same sequencer specialization as in your agent

  task main_phase( uvm_phase phase);
    uvm_sequence_base sqr_base ;

forever begin
   seq_item_port.get_next_item( req );

   sqr_base = req.get_sequencer(); // Returns 'm_sequencer' of type uvm_sequencer_base type
   $cast( sqr_h , sqr_base ) ;  // Downcast

  // Now you can access my_sequencer properties
  // Eg: sqr_h.property1 = <value> ;

   seq_item_port.item_done( < rsp_type_optional> );
  end
endtask

Btw I am curious regarding the intention behind the access.
(1) Have you added user-defined properties in your sequencer ?
(2) What purpose do these properties serve ?
(3) How are these sequencer properties assigned ?

4

recall that the req (seq_item) is passed by reference (by default) between SQR-DRVR

The prototype of the tasks get and get_next_item within class uvm_sequencer are defined as

task uvm_sequencer::get_next_item(output REQ t); 
task uvm_sequencer::get(output REQ t);

I believe the request ( as well as response ) are pass by value rather than pass by reference

5
  1. yes, I have took some properties
  2. based on updated properties in sequencer i have to send response from driver
  3. I have took some properties , which are updated from monitor during (seq-drv communication)
6

In SV, class objects are pass by ref and since REQ/RSP are class handles, they are passed by ref (and user has to copy/clone at destination if needed).

7

There is a distinction when an object is passed by reference v/s by value ( default ).

class base;
  bit [1:0] a ;
endclass  

module top;
  base b_h ;
  
  initial begin  
    b_h   = new();
    b_h.a = 1;
    $display("b_h is %0p",b_h);
    
    func( b_h );
    $display("b_h is %0p",b_h);
     
    func_ref( b_h );
    $display("b_h is %0p",b_h);    
  end
  
  function automatic void  func ( base b);
     b = new();
     b.a = 3;
  endfunction 
  
  function automatic void func_ref ( ref base b);
     b = new();
     b.a = 3;
  endfunction 

endmodule

For pass by reference the argument direction must be explicit ‘ref’ type which I don’t observe in the UVM base classes for the sequence and sequencer.

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