I’m new to UVM. i have created 5 agents ,5 interfaces and the interfaces are set in top module. while passing the different sequence to agent1 (interface intf[1]),agent3(interface intf[3] and channel agent (interface ch_if) all the agents have same result.i think all the interfaces are overriding or config set and get has issue.
Please help me to resolve this issue.
top module:
gen_if intf [4];
gen_if ch_if;
generate
for(genvar i=0;i< 4;i++) begin
initial begin
uvm_config_db#(virtual gen_if)::set(null,"*","vif",intf[i]);
end
end
endgenerate
initial
begin
uvm_config_db#(virtual gen_if)::set(null,"*","vif",ch_if);
end
Driver code:
if(!uvm_config_db#(virtual gen_if)::get(this,"","vif",driverif))
`uvm_fatal("NOIF", {"interface must be set for: ", get_full_name(),".driverif"});
Since there are Multiple Instances , one way would be to add a property in class
driver ::
int inst_id ; // To be set when create() is called for driver i.e From agent
Your top_module would also have to include the Instance Number with ‘field_name’ ::
generate
for(genvar i=0;i< 4;i++) begin
initial begin
uvm_config_db#(virtual gen_if)::set(null,"*", $sformatf("vif[%0d]" , i ) , intf[i]);
end
end
endgenerate
// Within Agent's build_phasse() ::
for( int i=0;i< 4;i++) begin
driver_h[i] = driver :: type_id :: create( $sformatf( "driver_h[%0d]" , i ) , this ) ;
driver_h[i].inst_id = i ;
end
// Within Driver's build_phase() ::
if(!uvm_config_db#(virtual gen_if)::get(this,"", $sformatf("vif[%0d]",inst_id ),driverif ))
`uvm_fatal("NOIF", {"interface [%0d] must be set for: ", inst_id , get_full_name(),".driverif"});
You need to provide the path to each specific agent in your uvm_config_db#()::set instead of using a wildcard “*”. You can quickly find out what the paths should be by commenting out the set() statements and seeing the path generated by get_full_name in the `uvm_fatal message.
while am passing specific agent path to config_db,the output of the all agent is similar to last agent( channel agent).but i passed different sequence to all the agent. the result should be different for each agent.
In reply to amsaveni.c:
Thank you for your valuable response. but your code is only work out for gen_if intf [4]; if i use gen_if ch_if(); parallely its not working.
Hey all,
I’m having the same issue, i want to instantiate one agent more than one time. I made my agent vif parametrizable, in agent level, I created one drv and one sequencer, and the env level, I instatited the agent as many times as needed then pass the coresponding vif to each agent. But when i try to assert/deassert a signal only for one instance, it gets asserted/deasserted for all agents.
Do you guys know what should i do ?
In reply to chr_sue:
Indeed, I created agent for that protcol in which i created its interface, drv, mtr, seqr. Imade this agent interface paramterizable. then in env i intantiated three agent from the agent i created. But the issue is when i want to assert a sig of a specific interface among these three interfaces it gets asserted for all interface. Note that, the assertion of that signal is done in run phase inside a block of fork join with protcol process.
in top i set vif
uvm_config_db#(virtual ahb_if)::set(null,““,“ahb_if0”, ahb_if0);
uvm_config_db#(virtual ahb_if)::set(null,””,ahb_if1", ahb_if1);
uvm_config_db#(virtual ahb_if)::set(null,“*”,ahb_if2", ahb_if2);
This is nor a problem. You can have the interface instances in your toplevel testbench. But ypu need the config_db calls for connecting these interfaces to the agents/drivers/monitors.