How to create random dynamic 2D arrays in SystemVerilog?

SystemVerilog
,
9

In reply to Shubhabrata:


class frame_packet;
  rand int width;
  rand int height;
  rand int data[][];
 
  constraint size_con {
    width inside {[0:10]};
    height inside {[0:10]};
    data.size() == width ;
    foreach(data[i]) {
     data[i].size()  == height;// inside {[0:10]};
    }
  }

endclass
 
module test;
 
initial begin
  frame_packet pkt;
  pkt = new();
  assert(pkt.randomize());

    for(int i=0; i<10; i++)
    for(int j=0; j<10; j++) 
    $display("data[%0d][%0d]=%0d",i,j,  pkt.data[i][j]);



end

endmodule

I meant data array’s value randomized with no constraint.
How do I make constrainted random data into the 2D data array?