How to check a signal toggling within certain time window?

Hi, can someone help me to figure out how to write a checker which throws an error if the signal(A) does not toggling in 5ns?

Two questions get me stuck:
1.No clk information, I cannot determine how the signal(A) with respect to the clk. Even we can have a clk, let’s say the clk period is 2.5ns, how to guarantee that the signal toggling point is just align with the clk rising edge.
2.How to determine the checking threads for the signal A toggling because signal A a continuous event.

I hope that I describe the question clearly. Thanks.

In reply to mlsxdx:

Below is an example; you can modify it as you see fit, but it demonstrates the approach.


import uvm_pkg::*; `include "uvm_macros.svh" 
module top; 
    bit clk, a;  
    int d=4;
    event e; 
    initial forever #1 clk=!clk;  
    
    task t_delay();  
        automatic realtime t; 
        t=$realtime; 
        @(a) a_delay: assert (($realtime- t) >= 5ns)
        else begin 
            -> e; 
            `uvm_error("MYERR", "delay error")
        end
    endtask  
    
    always  @(posedge clk)  begin 
        fork 
           t_delay(); // can use
        //  if(condition)  t_delay();
        join_none 
    end 
    
    initial begin 
        repeat(200) begin 
            #d;    
            if (!randomize(a, d)  with 
            { a dist {1'b1:=1, 1'b0:=1};
            d dist {1:=1, 2:=1, 3:=1, 4:=1, 7:=1};     
        }) `uvm_error("MYERR", "This is a randomize error")
    end 
    $stop; 
end 
endmodule 

Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
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Can also use sva

property p;
  realtime t;
    @(posedge clk) (1, t=$realtime) |-> 
         @(a)  t-$realtime >= 5ns;
endproperty