How to assign value to the function from different class with different enum

SystemVerilog
, ,
2

In reply to Jacky40210:

First I would tell the others that it is a bad practice declaring types inside a class. Put them in a sharable package.

You can cast to an enum type

   typedef bit [1:0] {
        READ = 0,
        WRITE = 1
    } enum_common_type
 function bit get_type ( bit [1:0] xact_type );
    enum_common_type xt = enum_common_type'(xact_type);
    `uvm_info(this.get_type_name(), $sformatf("Type is %h", xt.name()), UVM_NONE)
endfunction