In reply to UVM_LOVE:
In the real world of verification, you rarely have to verify a multiplier or any other arithmetic operator. You wither will pull some IP from your FPGA/ASIC vendor or your synthesis tool will implement it for you. You will have to verify that you have specified your multiplier correctly (for signed or unsigned arithmetic, and proper input/output sizing) and made the necessary connections to handle those inputs and outputs. For that you can use a combination of random testing and directed test for corner case.
If you are implementing an algorithm for a operator yourself, there are textbook examples for testing highly regular structures in simulation. There are also formal techniques for exhaustively verifying an operation.