How can I use hex value into enum?

SystemVerilog
,
2

In reply to UVM_LOVE:

module enum_datatype;
 
  //declaration
  //enum reg[7:0] { red=0x1, green, blue=4, yellow, white=10, black } Colors;
  typedef enum reg[7:0] { red=8'h2, green, blue=8'h4, yellow, white=8'h10, black } Colors;
  Colors Color;
  
  //display members of Colors
  initial begin
    Color = Color.first;
    for(int i=0;i<$size(Colors);i++) begin
      $display("Colors :: Value of  %0s \t is = %0d and Size is %d",Color.name,Color, $size(Color));
      Color = Color.next;      
    end
  end
  
endmodule

Colors is a datatype, declared a variable name Color. This works now!