Moderators,
I got uvm materials from Github to study UVM. This code was written by a long time ago. It seems like 2012.
But, I could not able to simulate it because it has error. Getting errors as below.
-- Compiling interface starter_if
# -- Compiling package starter_pkg
# -- Importing package uvm_pkg (uvm-1.2 Built-in)
# ** Error (suppressible): C:/uvm_starter/sv/starter_test.sv(54): (vlog-7027) The name ('factory.create_object_by_name') was not found in the current scope. Please verify the spelling of the name 'factory.create_object_by_name'.
# End time: 22:57:03 on Jun 02,2018, Elapsed time: 0:00:01
# Errors: 1, Warnings: 0
# ** Error: C:/intelFPGA/18.0/modelsim_ase/win32aloem/vlog failed.
# Error in macro C:\uvm_starter\sim\sim.do line 12
I think the difference between VMM and UVM is that. I am not sure. Bellow is the source code.
class starter_test extends uvm_test;
`uvm_component_utils(starter_test)
starter_tb tb;
function new (string name = "starter_test",
uvm_component parent=null);
super.new(name, parent);
endfunction // new
virtual function void build_phase (uvm_phase phase);
super.build_phase(phase);
tb = starter_tb::type_id::create("tb", this);
endfunction // build_phase
task run_phase (uvm_phase phase);
starter_base_seq seq;
string list_of_sequences[$];
uvm_cmdline_processor clp;
phase.raise_objection(this);
clp = uvm_cmdline_processor::get_inst();
if (clp.get_arg_values("+SEQ=", list_of_sequences) == 0) begin
`uvm_fatal("RUNPHASE", "no sequence specified")
end
foreach (list_of_sequences[n]) begin
$cast(seq, factory.create_object_by_name(list_of_sequences[n]));
seq.start(tb.env_in.agt.sqr);
end
phase.drop_objection(this);
phase.phase_done.set_drain_time(this, 100);
endtask // run_phase
endclass // starter_test
Please let me know how I can overcome this problem.
Anyone, guide me how can I fix these?
Chris