How can i make UVM register model-based sequence for serial interface?

Hi.

I’m qeustasim’s user.

I recently study uvm register model code example in wepsite.

The example contains register model-based sequence for parallel(APB).

But, register based sequence for serial(SPI) is not contained.
(SPI sequence is made not using register model sequence)

I have my DUT. and I will verify this DUT using uvm register model.

This DUT has only serial input and serial output and has some of registers.

now, the problem is happen.

How can i make register-based sequence for serial ?

In uvm register model code example, I guess i have to modify adapter(reg2apb) or driver.

Is it right?

If it is, How can i modify driver or adapter ?

Thanks.

The Cookbook register model example is based on a SPI master that is programmed via an APB interface. The SPI agent in the testbench is a SPI slave.

If you want to verify your DUT using a serial bus and the register model there is nothing to stop you doing that. Following the example, you would have to have or write a register adapter class for your serial agent to convert the register accesses to serial bus transfers. Once you have the adapter you can use it in the same way as the reg2apb in the example.

One word of caution though, with the serial bus agent you should ensure that the driver does not allow finish_item() in the sequence to complete until the serial transfer has completed, otherwise the register model may get ahead of what is happening in the design (i.e. it will think that a write is complete before it really is).