Generic covergroup definitions for range bins and other such frequently occurring needs

SystemVerilog
2

In reply to HvdS:

Sometimes you have to abandon the desire to express everything in one coverpoint and use an array of covergroups instead.

module top;
covergroup cg (ref int v, input int lsb);
  option.per_instance=1;
   coverpoint v {
     bins range = {[int'(lsb>0)<<lsb:(1<<lsb+1)-1]};
   }
endgroup
  int width=16;
  int signal;
  cg cg_inst[];
  
  initial begin
    cg_inst = new[width];
    for(int i=0;i<width;i++) begin
      $display("Constructng range [%0d:%0d]",int'(i>0)<<i,(1<<i+1)-1);
      cg_inst[i] = new(signal,i);
    end
  end
endmodule