Generating random values in increasing order

SystemVerilog
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2

In reply to Bhaskar44:

You probably want

	constraint r_delta {at > const'(at);}

More likely, you want

	constraint r_delta {at inside {[const'(at)+min_delta: const'(at)+max_delta]};}

where the deltas are to keep the arrival times within some range.

Also use
rand instead of
randcfor very large random numbers. randc may be very costly.