Forward referencing a class within a package?

SystemVerilog
, ,
1

Hi there,

I am trying to forward reference a class that is defined in a package using the typedef method. But compiler doesnt seem to like this. Does anyone know the solution/syntax to this or is this even possible?

Example:

typedef class saja::c2;

//class-1
class c1;
  c2 c;
endclass

package saja; 
	//class-2
	class c2;
  	//c1 c;
	endclass
endpackage

If I only do “typdef class c2”, the compiler complains:
The forward typedef of the class does not have a definition in the same
scope.
Please provide a definition to the forward class declaration.

However, if I do “typedef class saja::c2”, the compiler doesnt like it either:
Error-[SE] Syntax error
Following verilog source has syntax error :
“testbench.sv”, 4: token is ‘saja’
typedef class saja::c2;

Thanks.

2

In reply to wchua:

You have circular type dependancies, and the only way to resolve it is by declaring them in the same package. You might also be able to remove the circular dependency, but to help you requires more details.

3

In reply to dave_59:

Hi Dave,

Is it that forward referencing cannot be done with classes that are declared inside packages?

4

In reply to wchua:
You can only make a forward typedef to a class that will be declared later in the same scope. Your forward typedef is in the compilation unit scope (outside a package), and the declaration is not in the same compilation unit scope; it is in a package scope.