$floor function inside constraint

SystemVerilog
1

Hi,

I have the next scenario inside uvm_seqeunce_item class:

bit [10:0] a;
int b;
bit [511:0] data

I need to create constraint in which size of data array is subjected to ‘a’ and ‘b’ variables:
I tried to use $floor function inside the constraint and got an error since it’s not allowed to use $floor inside constraint (the constraint goes like that: data.size() == $floor(a/b)).

there is another way to take the whole part of a real number inside constraint?
another question since both ‘a’ and ‘b’ are integer is the division result automatically the whole part of the division result and no floor is needed inside the constraint

Thanks!

2

In reply to moshiko:

There is no need to use $floor here because integer division truncates. Constraints can only use integral values.

3

What can be the option of $ceil in the constraint?

final_width inside{[1 : $ceil(width/64)]};

I am looking if the width is 72 then final_width can be 1 or 2.
But $ceil is giving Error as the real number can’t be use inside the constraint.