Factory is not overriding the extended class

UVM
,
1

I have following extended sequence class

class mfas_sequence #(type in_item = a_sequence_item , type out_item = d_item) extends base_sequence #(in_item , out_item); 
   
   bit enable_err;
   constraint c_err {enable_err == 0;}

   rand bit [7:0] corrupt_bytes; 

   `uvm_object_param_utils_begin(mfas_sequence #(in_item, out_item))
       `uvm_field_int(enable_err, UVM_DEFAULT|UVM_HEX)
       `uvm_field_int(corrupt_mfas, UVM_DEFAULT|UVM_HEX)
   `uvm_object_utils_end
  
   extern virtual task body();
   (Note: in this task body have a display statement stating "using extended class")
  
endclass

Following code is inside the test class

class err_test extends x_test;

   `uvm_component_utils(rr_test)

   bit [8:0] rd_bit_align_data;
   
   mfas_sequence#(a_sequence_item, d_item) m_seq;


   function new (string name= "err_test", uvm_component parent = null);
      super.new(name, parent);
   endfunction // new
   
   
   function void build_phase(uvm_phase phase);

      set_type_override_by_type(base_sequence#(a_sequence_item, d_item)::get_type(), mfas_sequence#(a_sequence_item, d_item)::get_type());

      super.build_phase(phase);

      
   endfunction // build_phase
   
..........

endclass //err_test

Printing factory in the end_of_elaboration phase.
But do not see the overridden sequence when the factory gets printed. This is also confirmed as the print statement from the extended class does not get printed, instead it prints out base class’s display statement.

Have used override before, except the class was not parameterized. Not sure something needs to be done differently for overriding parameterized class.

Can someone please help resolve this.

Thnx

2

In reply to vsirsikar:

Can we see how you registered base_sequence with the factory?

3

In reply to dave_59:

I should have commented on my own question.
The problem was --parameters were not of same type. Once that change was made, had to import a package in the test for that particular item type.
After these two changes, factory did override the extended class.

In above example a_sequence_item was suppose to be b_seq_item, and it had it’s own pkg(b_pkg), which needed to be imported.
The base_seq class was created in the env using parameters b_seq_item & d_item.

Thanks for commenting back.

4

In reply to vsirsikar:

One more thing; though not related to your question at hand…

bit enable_err;

should infact be

rand bit enable_err;

Vivek