Events

SystemVerilog
, ,
1 

module event_m;
event a;

initial
#1 -> a;

always
begin
wait(a.triggered);
$display(" EVENT A is triggered ");
//#1;
end
endmodule

When I comment #1 and execute, it goes to infinite loop and I don’t why it is going to infinite loop.
have gone through this conversation What difference between @event and wait (event.triggered) ? | Verification Academy
my understanding is both initial and always blocks starts execution at 0ns but the “event a” is triggering at 1ns in initial block. The always block also gets executes at 0ns but it will wait for that event up to 1ns, after that it will come out from the always block. then again it will get into the always block at 1ns it will wait for the “event a” but it is already occurred in previous time slot and it is no longer available. since it is a wait statement, it will wait until event occurs that’s why it is going to infinite loop. Is this correct understanding.

2

In reply to abhishek403:

I don’t think you have the right understanding.
The problem is (a.triggered) remans true until time has a chance to advance to the next time slot. When you comment out the #1, the always block is just like a forever loop, and has no chance to advance time, so a.triggered remains true each time through the loop.

3

In reply to dave_59:
Thank you so much dave