Ethernet header + payload

UVM
,
1

i have defined ethernet header structure(eh) and payload in seq_item,and in seq i have defined a task “pack_header” for this task i was giving input as eh and payload in task body,
now i want both ethernet header + payload in “pkt_out”. I need to append out_arr to data…

task pack_header(input bit[7:0]in_arr[],ref int index,ref bit[7:0]out_arr[$]);
foreach(in_arr[i]) begin
out_arr[index+i]=in_arr[i];
end
// index+ = in_arr.size;
index = index+$size(in_arr);
endtask

virtual task body();
int index = 0;
bit [7:0] out_arr[$];
bit eh; //eh is handle for ethernet header which is struct coming from sequence_item
bit [7:0]payload[];
logic pkt_out;

trans = avst_sequence_item::type_id::create("trans");

repeat(3) begin

start_item(trans);
assert(trans.randomize());

pack_header(eh,index,pkt_out);
pack_header(payload,index,pkt_out);

trans.data={>>{out_arr}};

finish_item(trans);
// `uvm_info("AVST_Seqr",$psprintf("Seq_Data is : [%d]\n",trans.convert2string()),UVM_LOW);
end
endtask

Those are the errors I’m getting…help me with it…to resolved

# ** Error (suppressible): avst_sequence.sv(35): (vlog-2997) Arg. 'in_arr' of 'pack_header': Cannot assign a packed type 'bit' to an unpacked type 'bit[7:0] $[]'.
# ** Error: avst_sequence.sv(35): The actual (pkt_out) and formal (out_arr) for a ref must be equivalent types.
#
# ** Error: avst_sequence.sv(38): The actual (pkt_out) and formal (out_arr) for a ref must be equivalent types.
#
2

In reply to UvmSv:

A handle is a class object. This line of code

bit eh;

does not show this. It is a single bit nothing else.

3

In reply to chr_sue:

eh is handle for ethernet header which is struct coming from sequence_item

How to get eh handle in sequence?

4

In reply to UvmSv:

The declaration

bit eh;

does not represent a struct. It is a simple bit variable.

5

In reply to UvmSv:

Did you mean to declare eh as a dynamic array of bytes and not a single bit?

bit[7:0] eh []

If you meant a struct, where is that struct defined and what does it look like?

6

In reply to dave_59:
In reply to chr_sue:

struct defined in sequence_item…and this

bit eh

is handle of that structure

class avst_sequence_item extends uvm_sequence_item;
....................
  typedef struct{
  rand bit [47:0] dst_addr;
  rand bit [47:0] src_addr;
  rand bit [15:0] ether_type;
  } eth_header;
  
  rand eth_header eh;
......................
endclass
7

In reply to chr_sue:

Got your point…so how i defined this eh here in sequence…because i defined this struct in sequence_item…so again i have to defined here?

8

In reply to UvmSv:

Best is to define the struct and other useful data types in a package. Then you can import it in any place you need it.

9

In reply to chr_sue:
Ohh okay…! I’ll try this