Error - near ":": syntax error, unexpected ':', expecting IDENTIFIER or clock

UVM
, ,
7

In reply to Srini @ CVCblr.com:
I changes to the following:

`ifndef MY_MACROS_SV
`define MY_MACROS_SV

// MACRO: 'my_fatal_err
// calls uvm_fatal in case the assertion is not correct
`define my_fatal(condition, msg )\
   assert (condition) else\
`uvm_fatal("FATAL ERROR", msg)

`define add_rand(mem_type, mem)\
  begin\
   case (mem_type)\
     "int": add_rand_int(mem);\
     "bit": add_rand_bit(mem);\
     default: `uvm_fatal("FATAL ERROR", "type is not supported")\
    endcase\
  end

`endif  //MY_MACROS_SV

Now I got:
while parsing macro expansion: ‘add_rand’ starting at …\sv\tx_transaction.sv(17)
at …\sv\tx_transaction.sv(17): near “begin”: syntax error, unexpected begin, expecting function or task.

*I called this macro from tx_transaction by:
`add_rand(“int”, mem_int)