@peter:
when you say "the addr ,wr_en,rd_en etc still are unknown. ", is it for every clock? only when driver drives it? always? did you print the req in the “drive” task?
also , please always make sure you use the same clocking block clk , which you are using to drive the signals.
try updating the “drive” task to this.
virtual task drive();
`DRIV_IF.wr_en <= 0;
`DRIV_IF.rd_en <= 0;
@(`DRIV_IF);
`DRIV_IF.addr <= req.addr;
if(req.wr_en) begin
`DRIV_IF.wr_en <= req.wr_en;
`DRIV_IF.wdata <= req.wdata;
end
@(`DRIV_IF);
//end
if(req.rd_en) begin
`DRIV_IF.rd_en <= req.rd_en;
@(`DRIV_IF);
`DRIV_IF.rd_en <= 0;
@(`DRIV_IF);
req.rdata = `DRIV_IF.rdata;
end
endtask : drive