Thank you for your answer so, my objectif is to make generic uvm_config_db , for this i instaciate it by master and slave interface.
- i have the instance of apb_s0 and ahb_m0 in my tb.sv
2 ) i have apb as slave interface and ahb as master interface
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i tried it but i have the same error
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when i instanciate my master_interface and slave_interface i didn’t resolve the error
5 ) as I had a bridge-specific config_db in tb.sv, and I want to make a generic part in top_tb.sv