Envoke clock from command line interface using uvmf provode makefile

COMMON_VSIM_ARGS += -sv_seed (TEST_SEED) +UVM_TESTNAME=(TEST_NAME)
(UVM_CLI_ARGS) \ -permit_unmatched_virtual_intf \ +notimingchecks -suppress 8887 \ -solvefaildebug -solvefailtestcase \ (COMMON_VSIM_ARGS_$(USE_QUESTA_PROFILER))
above provided in uvmf script in sim

below is what i want to accomplish
COMMON_VSIM_ARGS += -sv_seed (TEST_SEED) +UVM_TESTNAME=(TEST_NAME)
+define$(X_DEFINES)
(UVM_CLI_ARGS) \ -permit_unmatched_virtual_intf \ +notimingchecks -suppress 8887 \ -solvefaildebug -solvefailtestcase \ (COMMON_VSIM_ARGS_$(USE_QUESTA_PROFILER))
such that i can give this from command line

make debug +UVM_TESTNAME=ALU_random_test X_DEFINES=$X_DEFINES+CLK_FREQ
but not able to achieve.CLK_FREQ in defined in hdl_top using ifdef CLK_FREQ…else…endif.