In reply to chr_sue:
Hi chr_sue, thanks for your answer.
My question doesn’t seem to be as clear as I though :)
I’ll try to clarify.
I am employing the UVM RAL already, the 5 points I mentioned in my first post are the mechanism I have in place currently but I am not quite happy with that.
“But you can use configuration objects to randomize the data members of these objects. After randomization you can write these configuration data to your configuration registers.” this is what I am doing basically. This is working fine as long as my tests don’t need to change any register value after the DUT initialization. Trouble will come when:
- the test writer is writing into a register without updating the configuration object.
- the test writer is changing the configuration object without propagating this change to the actual registers.
Is there a (common) way to ensure that this configuration object and the RAL/DUT registers are kept in line?