Embedded Covergroup, automated bins creation using const array

SystemVerilog
1

I would like to automate bin creation inside an embedded covergroup. I want one bin per value in a table.

covergroup cg_transition_table;
  option.per_instance=1;
  cp_mml_state_mode : coverpoint value {
    bins hope_this_works[]=TEST_TABLE;
  }
endgroup

If I define a dynamic test table, it creates 64 bins, values ranging from 0 to 2^32-1. DOH!
Note sure what’s going on there.

const uint32_t TEST_TABLE[]= {
1,2,3,4,5,6
};

If I give the table a static length, it creates exactly 6 bins, just what I need.

const uint32_t TEST_TABLE[6]= {
1,2,3,4,5,6
};

However, the real table is very long, and I don’t want to hard-code the length.
All table entries are non-zero. Also, I don’t believe the array locator methods work on my current simulator version. :p

2

In reply to bmorris:

For this what we can do is I guess this could be a solution for you that could help:

In the covergroup pass a argument which is of dynamic variable and use it in the coverpoint creation for example in your code.

 covergroup cg_transition_table with function sample(bit table_test[]);
  option.per_instance=1;
  cp_mml_state_mode : coverpoint table_test iff(table_test.size() == x)
 {
    bins hope_this_works[]=TEST_TABLE;
  }
endgroup

You can pass the argument when sampling the dynamic array of any size and issue of creating fixed size bins should be removed based on the size() argument you are giving to a coverpoint.