Dynamic array initialization with default: or similar

SystemVerilog
1

A standard array can be initialized using:

int array[0:1023];='{default:2};

Is such a construct possible with dynamic arrays? Or any other shortcut to initialize all the elements to e.g. 2?

2

In reply to NiLu:

I have found out that it is illegal to assign that pattern to a dynamic array, because it needs to be resized, and the pattern does not convey that info. Simulators used to allow such an assignment to dynamic arrays, but are starting to flag it as an error. I think the best thing to do is to use a foreach loop to initialize the dynamic array.

Hope this helps.

3

The problem here is that when you make an assignment to dynamic array as an aggregate, the original size of the the dynamic array is meaningless. SystemVerilog is expecting to copy the array on the RHS to a newly constructed array of the same size on the LHS. The RHS therefore needs a self-determined context to define the size of the array.

So you have a few choices

  • Use a foreach loop;This is what the compiler does for you in the fixed array size case anyways
  • Use an array literal '{1024{2}}
  • Create a fixed array parameter int da2[1024] = '{default:2};, and then assign that to your dynamic array