Dumping vcd files in a UVM test

UVM
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11

In reply to cgales:

For example, I was doing the following manually in the transcript(the run times below are based on signal events)
vcd files basic_scenario_rx.vcd basic_scenario_tx.vcd
vcd add -file basic_scenario_tx.vcd -r /toplevel_top/src_dut/CORE/*
vcd add -file basic_scenario_rx.vcd -r /toplevel_top/sink_dut/CORE/*
vcd off basic_scenario_tx.vcd
vcd off basic_scenario_rx.vcd
run 1440926.34ns

vcd on basic_scenario_rx.vcd
run 39996.93ns

vcd on basic_scenario_tx.vcd
run 94380.84ns

vcd off basic_scenario_tx.vcd
run 10977.95ns

vcd off basic_scenario_rx.vcd

What I want is to do:
run -all
Then within the systemverilog testbench, I want to invoke the above transcript commands

Thank you for your interest