In reply to Shahid Khokher:
In reply to Shahid Khokher:
Thanks chr_sue for your response. I tried the suggested change but it did not help.
I have identified your problem. You are passing your interfaces to your config_db in hdl_top. IIn hvl_top you are starting run_test, which makes an instance of your UVM environment. Now it looks like you are perfromimh the get tp the config_db earlier than making the set.
I’m not sure if there is a well-defined order top toplevels in the simulator are processed.