Hi, I am trying the Dual Top UVM Architecture as provided in the UVM cookbook and struggling with the configuration database where my test-case unable to get the required interface from the configuration database. I am using EDA Playground to compile and simulate my design. Please ignore the run_p…

In reply to cgales : Thanks all but I figured out the issue a couple of hours ago. I was not sure about how EDA playground compiles the provided HDL and HVL blocks. EDA play ground gives you a default design.sv file, which should be the top level for the static part of the TB. My HDL top level cont…

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DUAL TOP UVM Architecture Issue

UVM

chr_sue April 11, 2019, 11:39am 5

In reply to Shahid Khokher:

What is trhe error message you get?