Hi,
I am doing a read operation for one of the register and printing the desired and mirrored values of that register.
But it is getting a value of ‘0’ for both desired and mirrored.
For write operation:
I am doing a write method call for one register and printing desired and mirrored values for that particular register, and now am getting the values which I have written.
Does the desired and mirrored values be cleared off when we do a read operation on any register?
Please clarify me.
Thanks
Naveen
Hi Naveen,
Did you read before writing some value into register or after reset,
it will give you reset value if you do like that check if you are getting read value also zero.
Do read after writing a known value into register so you can verify
Thank you,
In reply to jaswanth_b:
Hi Jaswanth,
Yes, I did not read before writing some value.
I am reading only after writing some value to that register and am writing to that register after reset only.
But, the thing is in my DUT there is memory with 3 locations.
In my RAL model am considering those 3 locations of memory as registers and am extending them from ‘uvm_reg’.
Will there be any problem with it?
Thank you.
In reply to naveen-y:
what you have done is correct. registers are to be extended from uvm_reg,
desired and mirrored values wont be cleared after read but gets updated with read value so check when you read the register what about your read value apart from desired value.
Is read value is also 0.
In reply to jaswanth_b:
Yes, I checked the read value also, and it is not 0.
In reply to naveen-y:
can you send the code may be we can have a look.
In reply to jaswanth_b:
I found the mistake.
I am creating the ral_model in environment’s build_phase instead of test and calling ‘build’ method also in environment.
May be due to that it is not coming and I need to check on that.
Can we create ral_model in environment or else we should create only in test?
In reply to naveen-y:
we can create RAL model in environment and use it.