Hi all,
I recently bought the book “SystemVerilog for Verification” by Chris Spears. There are a number of exercises in the book but no answer discussion within.
As this should be a pretty commonly used book, I was wondering if anyone knows of places/forums/etc where the book exercises are discussed? Kind of useless to work through these problems without feedback.
Otherwise I suppose I can spam questions individually here but ideally I’d like to avoid that.
Cheers!
In reply to silverace99work:
The questions at the end of each chapter are homework problems when the book is used for a course. The answers are available for certified instructors.
Most are fairly straightforward and can be answered with the info provided in the book. You can verify your results with your favorite simulator.
In reply to chrisspear:
In reply to silverace99work:
The questions at the end of each chapter are homework problems when the book is used for a course. The answers are available for certified instructors.
Most are fairly straightforward and can be answered with the info provided in the book. You can verify your results with your favorite simulator.
Thanks for the reply Chris! I hope you won’t mind if I utilize the power of the forums to discuss some of them should the need arise. I’m not a student anymore but SV is something I only have some working experience with and not deep education on.
In reply to silverace99work:
Thank you for buying my book and exploring this topic.
I don’t share the answers / solutions for anything in the book. Presumably, if you are reading my book, you want to be a verification engineer, or at least improve your verification skills. So you need to verify that your code really works. That is the best way to learn SystemVerilog and build your verification skills.
Additionally, if I shared the code, you would run it, see no errors, and not really learn anything.
Finally, this is a textbook for many university courses. If I post the answers, someone could just Google the answers, and not learn the material.
Enjoy your SystemVerilog journey!
Chris Spear