Different RESET Type on UVM register model

In reply to chr_sue:

In reply to UVM_LOVE:
The register reset is defined on register maps and registers.
You can execute get_regsiters and store all registers in a queue. Then you can run a loop to reset the single registers with the exception of the excluded registers.

I found the usage of “set_reset” in UVM Register Model Example


class ral_cfg_timer extends uvm_reg;
	uvm_reg_field timer;     // Time for which it blinks

	`uvm_object_utils(ral_cfg_timer)
	function new(string name = "traffic_cfg_timer");
		super.new(name, 32,build_coverage(UVM_NO_COVERAGE));
	endfunction

  virtual function void build();
     this.timer = uvm_reg_field::type_id::create("timer",,get_full_name());

    // configure(parent, size, lsb_pos, access, volatile, reset, has_reset, is_rand, individually_accessible); 
     this.timer.configure(this, 32, 0, "RW", 0, 32'hCAFE1234, 1, 0, 1);
     this.timer.set_reset('h0, "SOFT");
  endfunction
endclass

I want to know the usage of “SOFT” from this.timer.set_reset('h0, “SOFT”); Especially, Whatdoes “SOFT” mean ? Could you give me the usage?

Some explains that from
Your text to link here…
as the below,

set_reset
virtual function void set_reset( uvm_reg_data_t value,
string kind = “HARD” )
Specify or modify the reset value for this field

I have 2 Questions

  1. Here used with HARD NOT SOFT?, does this mean that can I declare User-Defined reset signal?
  2. What IF SOFT, HARD are implemented in set_reset method, How do I excute SOFT, HARD reset and User-Defined Reset?
    Thank you in advance