Hi Moderators,
Intention is to detect interrupt assertion within Monitor. Here is my simple attempt: edalink
I tested the code across the 3 main tools
On tool1 I observe Null pointer error from line 37 without observing $display messages on line 29 and 33
On tool2 I observe a Fatal message (Null instance encountered ..) from line 33
None of the three $display messages are observed ( although 2 of them occur before line 33 )
On tool3 I observe compilation error “Expressions of real, time, string and event types, as well as dynamic. SystemVerilog types, are not allowed in sampled system functions.”
Interestingly on commenting line 28 ::
On tool1 there is no error. Logically it doesn’t make sense why commenting line 28 makes the code work
On tool2 and tool3 the same respective output is observed
My questions are as follows
(Q1) Is there an issue with line 28 ? I added it to ensure get is successful. Without it the get would still be successful as B2 executes after B1 from source code perspective
(Q2) Can the clocking event (2nd argument) of Sampled value function reference a signal via virtual interface ?
(Q3) Can the expression (1st argument) of Sampled value function reference a signal via virtual interface ?
(Q4) Using +define+VINTF1
Can the clocking event within SVA reference virtual interface signal ? Or is there is a possibility of null pointer error ?
(Q5) Using +define+VINTF2
Can the sequence_expresssion within SVA reference virtual interface signal ? As the virtual interface has been fetched, the signal intr would be sampled after the clocking event I believe there should be no null pointer error
(Q6) Does the LRM restrict referencing virtual interface signals ( as clocking event / signal in sequence_expression / property_expression ) within a concurrent assertion ?
Thanks in Advance
AGIS