Cross onehot coverage

UVM
, ,
1

Hello,

I have 20 registers (reg0,reg1,reg2,reg3 …) and i have 20 coverpoints where i check if register is set or not.


      Reg0: coverpoint reg0_m {
      bins off  = {32'h00000000};
      bins on  = {[32'h00000001:$]};
     }

now i want to check cases when, all the registers are off except one, for each register.
I can cross all the coverpoints, like this


  select_x: cross reg0,reg1...{

          bins onehot1000... = binsof(reg0.on) && binsof(reg1.off) && ...;
          bins onehot0100...
}

but this will take lot of time.
I was wondering is there any faster and more optimized way of doing this?

Thanks in advance

2

In reply to EleneSajaia:

It’s difficult to automate code with many registers when they all have unique names instead of using an array.One idea to make your cross simpler is writing two overpoints with one bin instead of one coverpoint with two bins. Then you can write a cross for each select without any bins or ignore_bins

Reg0_off: coverpoint reg0_m =='0 { bins off = {1'b1};}
Reg0_on:  coverpoint reg0_m !='0 { bins on = {1'b1};}
Reg1_off: coverpoint reg1_m =='0 { bins off = {1'b1};}
Reg1_on:  coverpoint reg1_m !='0 { bins on = {1'b1};}
...
select_1000...:  cross Reg0_on,Reg1_off,...;
select_0100...:  cross Reg0_off,Reg1_on,...;
...
3

This is how I solved it.



bit reg_sel;
bit sel_0,sel_1...;


 covergroup reg_sel_cg with function sample(int id);
     option.per_instance = 1;

      cp_onehot: coverpoint id iff (reg_sel[id]==1 && $onehot(reg_sel) ) {  
        bins onehot_b[] = {[0:19]};
      }
      cp_count_two: coverpoint id iff (reg_sel[id]==1 &&( $countones(reg_sel)==2) ) {
        bins count_two_b[] = {[0:19]};
      }

   endgroup : reg_sel_cg

   covergroup counts_cg ;
     option.per_instance = 1;

    cp_count_two: coverpoint $countones(reg_sel){
      bins count_3_b = {3};
      bins count_4_b = {4};
      bins count_5_b = {5};
      bins count_6_b = {6};
      bins count_7_b = {7};
      bins count_8_b = {8};
      bins count_9_b = {9};
      bins count_10_b = {10};
      bins count_11_b = {11};
      bins count_12_b = {12};
      bins count_13_b = {13};
      bins count_14_b = {14};
      bins count_15_b = {15};
      bins count_16_b = {16};
      bins count_17_b = {17};
      bins count_18_b = {18};
      bins count_19_b = {19};

    }

   endgroup : counts_cg

 virtual function void sample();

     sel_0= (reg_0==32'h00000000) ? 0 : 1;
     sel_1= (reg_1==32'h00000000) ? 0 : 1;
     reg_sel = {sel_19,..,sel_1.sel_0};

     for(int i=0;i<19;i++)begin
      reg_sel_cg.sample(i);
     end
     counts_cg.sample;

   endfunction : sample