Cross_auto_bins_max option for Cross coverage

SystemVerilog
1

Hi,

I m using QuestaSim 6.6b. I have a problem with using cross_auto_bin_max.

For instance, consider the following code:
CP_1: coverpoint a;
CP_2: coverpoint b;
CP_3: coverpoint c;
CP_4: coverpoint d;

cross_1: cross CP_1, CP_2, CP_3, CP_4
{
bins b1 = binsof (CP_1) && binsof(CP_2) && binsof(CP_3)intersect {1} &&
binsof(CP_4) intersect {0};
options.cross_auto_bins_max = 0;
}

From the above code, i expect that though there are 16 cross combinations (a,b,c,d are single bit values), the required number of combinations is of bin “b1” (4).
Therefore, by adding options.cross_auto_bins_max = 0, it is expected that other automatic bin combination should not be generated.
This does not seem to be happening in QuestaSim.

Is there a limitation in using this option?

2

cross_auto_bins_max was removed from the IEEE LRM in 1800-2005. It was poorly defined. Useignore_binsinstead.

Dave