how to create a folder in SystemVerilog?
In reply to Moein75:
There is no such thing as a “folder” in SystemVerilog. Please explain further.
I mean how to create folder through SystemVerilog code. For example we can create file using $fopen, can not we create folder?
In reply to Moein75:
There is no such funciton/task/macro to create folder, only you can use mkdir in you makefile.
In reply to Moein75:
On most operating systems, fopen only creates files and does not know anything about folders or directories. You have at least three options:
- create the folder using the script that invokes your simulation
- If you are running on Linux, you can import the mkdir system function, then call it.
import "DPI-C" function int mkdir(input string path, int mode);
- Use the $system(“mkdir myfolder” systemfunction.