Correction Required in UVM Cookbook – Object vs. Component Override Explanation

UVM
1

Dear Verification Academy Team,

I appreciate the effort put into creating the UVM Cookbook, which has been an invaluable resource for the verification community. However, I came across a discrepancy in the section on Object Overrides.

The book states that “The code for an object override follows the same form as the component override,” and it provides an example where object creation is done using:

::type_id::create(“”, );

However, this is incorrect because, unlike components, objects do not require a parent during creation. The correct syntax for object creation should be:

::type_id::create(“”);

This is an important distinction, as many engineers refer to this cookbook as a primary learning resource. The current explanation may cause confusion or incorrect understanding of object overriding in UVM. I kindly request you to update the content with a proper explanation and corrected examples to maintain clarity and accuracy.

Thank you for your time and consideration. I appreciate your contributions to the verification community!
image

Best regards,
sai sambasiva gidaturi,
VLSI Verification Engineer

2

The syntax is correct. The parent argument gets used as a context for instance overrides the same as a component.

3

@dave_59 Thank you for the clarification! However, my understanding is that for object creation, the parent argument is not needed because UVM objects (derived from uvm_object) do not have a hierarchy like UVM components. Also, instance overrides apply only to UVM components, not to UVM objects.

Could you please clarify how the parent argument is relevant in the context of object creation? If this is an intentional mechanism, it would be helpful if the cookbook provided more explanation to avoid confusion for readers

4

The 3rd line in the screenshot you attached tells us instance overrides can be applied for objects as well

Here’s a few links that could help
(1) link1
(2) link2 => A practical example

5

try to write a test : create a sequence with seq=seqType::type_id::create(“seq”, this) in your test or other uvm_components, then try the same in another seq(uvm_object), it will answer your question.