Constraint solver timeout debug

SystemVerilog
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1

Hi

I have been facing a constraint solver timeout issue with my test and it took me a lot more time to debug than I expected.
So is there a good way/approach to debug constraint solver timeout? In my case there were only a few constraints that I had to trace for solver contention, but if there are a lot more constraints I know my approach will not work.
I literally evaluated every condition in each constraint and figured it out. I’m hoping there is a better approach, so any suggestions?

Thanks

2

In reply to Sharandiva:

You need to read the user manual or contact your vendor for support. Every tool has specific things they can do to profile your constraints.