Constraint random generation for ISS

SystemVerilog
,
6

In reply to rupeshblr:

[quote]In reply to rupeshblr:

Please look at the following example code.

module x;
  initial begin
  randsequence(main)
    main: code_block1 code_block2;
  code_block1: { 
    			$display("IF.nz LABEL1"); 
    			$display("..<next instruction>"); 
    $display("ENDIF\n"); 
    			} ;
  code_block2: {
    			$display("LABEL1");     			
    $display("rest of the instructions under LABEL1\n");     					   };
  endsequence
  end
endmodule

What is shown here is probably 1% of what randsequence can do. Please go through randsequence thouroughly in order to understand how to randomize etc.