Constraining the columns of a Matrix

SystemVerilog
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4

In reply to Fa300:

You can still use that solution by creating another unpacked array, and setting the following constraint;

rand bit [X-1:0][Y-1:0] packed_matrix;
rand bit unpacked_matrix[X][Y];

constraint matrix_equivalent {
   foreach(unpacked_matrix[x,y]) unpacked_matrix[x][y] == packed_matrix[x][y];
}
constraint matrix_col {
    foreach (unpacked_matrix[,j]) unpacked_matrix.sum() with (int'(unpacked_matrix[item.index][j])) == 1;
  }