Compare objects and find mismatch

SystemVerilog
2

Are you using the UVM? It has some helper routines so you can define a do_compare method inside your class:

virtual function bit do_compare (uvm_object rhs, uvm_comparer comparer);
      type(this) rhs_;
      $cast (rhs_, rhs);
      do_compare = 1;
      do_compare &= comparer.compare_field ("d1", d1, rhs_.d1, $bits (d1), UVM_HEX);
      do_compare &= comparer.compare_field ("d2", d2, rhs_.d2, $bits (d2), UVM_HEX);
      do_compare &= comparer.compare_field ("d3", d3, rhs_.d3, $bits (d3), UVM_HEX);
   endfunction : do_compare