Code to generate pulses at a given rate using constraint randomization

SystemVerilog
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4

In reply to sruthikrapa:

Hi Dave,

Just wanted to add the below information too.

From the syntax #4 clk = ~clk, 4 is known as for example 4ns from the `timescale function specified in verilog. The same way I want to randomize the #number with #rate and wanted the rate to be 1G, 2G, 5G and 10G and would like to know how to implement this in systemverilog along with constraint randomization.

Thanks,
Sruthi.