In reply to moshiko:
Several issues:
- You will want to create different clocking blocks for different functionality. The directionality of the signals is critical for correct functionality. For a driver clocking block, the signals like ‘addr’ will be outputs. For a monitor clocking block, the signals will all be inputs. Make sure you reference the correct clocking block in each component.
- When using clocking blocks, all references need to be made using the clocking block (vif.cb.signal). Don’t refer to the signals directly (vif.signal).
- Don’t use modports. They are design constructs and aren’t used for verification.
- When assigning values to clocking block signals, you need to use non-blocking assignments.