Clock generation through UVC

UVM
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2

In reply to louis-alexandre.latchimy:

I always use clock UVC and clock generation part is coded in clock interface itself. Agent sets random frequency to be used and then there are multiple sequences available to start/stop clock. driver gets the command and calls task in interface to start or stop clock accordingly. clock interface looks like this:

interface clk_if;
output clk;
bit clk_on;
int clk_high;
int clk_low;

always begin
if (clk_on) begin
   clk = 1;
   #clk_high;
   clk = 0;
   #clk_low;
end
end

task start_clock()
 clk_on = 1;
endtask
endinterface