Class test has not been instantiated when run_test is run?

UVM
,
1

This is a piece of uvm example code which can run without any issue. My question is: class “test” is defined, but has never been instantiated. How could we run the task “run_test” of a class that has not been instantiated?

Thanks,

Chris

import uvm_pkg::*;
`include "uvm_macros.svh"

program t1;
   class test extends uvm_test;
     `uvm_component_utils(test)
     function new (string name = "test", uvm_component parent);
       super.new(name, parent);
     endfunction

     virtual task run_phase(uvm_phase phase);
       phase.raise_objection(this);
       #100 `uvm_info("E1", "hello form E1", UVM_MEDIUM); 
       phase.drop_objection(this);
     endtask

   endclass

   initial begin
     run_test("test");
   end


endprogram
2

In reply to ningyangverification:

Even if test is not instantiated explicitly, when test class name is passed to run_test(“test”) method or by +UVM_TESTNAME=“test” (Later overrides the first if passed both), this test name is passed to factory.create_component_by_name() method call in uvm_root::run_test().

Here factory creates the test and returns the object on uvm_test_top.

3

In reply to ningyangverification:

If you want to understand how all this works, please see my SystemVerilog OOP course, especially the third session,