Class properties access in system verilog

In reply to Vdas:

When you say “access the data variables of class A”, we need a better definition of what your intentions are. You can bit-stream all variables of a class together if they are all integral types. To create an array, all variables need to be the same type. An associative array can be indexed using a string name.

int array[string];

array["t_start"] = 0;
array["t_end"] = 10;

Then you could iterate over all the variables using foreach.

The UVM has an elaborate set of field automation macros that can register each class variable and then build a limited functions of combined operations on all the variables like print, copy and compare.