In reply to watashi:
See this piece of code. Does this match your intent?
import uvm_pkg::*;
`include "uvm_macros.svh"
class dti_axi4lite_m_burst #(parameter AXI4LITE_ADDR_WIDTH = 32, parameter AXI4LITE_DATA_WIDTH = 32) extends uvm_sequence_item;
`uvm_object_param_utils(dti_axi4lite_m_burst #(AXI4LITE_ADDR_WIDTH, AXI4LITE_DATA_WIDTH))
function new (string name = "");
super.new(name);
endfunction
endclass
module top #( AXI4LITE_ADDR_WIDTH = 32, AXI4LITE_DATA_WIDTH = 32);
dti_axi4lite_m_burst #(AXI4LITE_ADDR_WIDTH, AXI4LITE_DATA_WIDTH) dti;
initial begin
dti = new("dti");
`uvm_info("ID", $sformatf("dti #(%1d, %1d)", AXI4LITE_ADDR_WIDTH, AXI4LITE_DATA_WIDTH), UVM_LOW)
end
endmodule